Information Processing

The ultimate goal of the DARPA Accelerated Computation for Efficient Scientific Simulation (ACCESS) is to demonstrate new, specialized benchtop technology that can solve large problems in complex physical systems on the hour timescale, compared to existing methods that require full cluster-scale supercomputing resources and take weeks to months. The core principle of the program is to leverage advances in optics, MEMS, additive manufacturing, and other emerging technologies to develop new non-traditional hybrid analog and digital computational means.

Commercial Test and Measurement equipment has advanced greatly with the emergence of sophisticated cellular and wireless local area network technology and can be used to intercept, analyze and exploit our military communications signals.

Radio Frequency and mixed signal electronics face performance limitations due to the limited circuit complexity possible in typical high-speed/high-dynamic-range compound semiconductor integrated circuit technologies. By integrating these high-performance electronics with deep submicron silicon complementary metal-oxide semiconductor (Si CMOS) technology, designers can exploit the ultra large scale integration density of Si CMOS to combine complex signal processing and self-correction architectures with the highest performance compound semiconductor electronics, thus achieving unprecedented levels of performance (e.g. bandwidth, dynamic range, power consumption).

High performance optoelectronic systems, e.g. ultra low-noise lasers and optoelectronic signal sources, are employed in numerous applications such as fiber optic communications, high-precision timing references, LADAR, imaging arrays, etc. Current state-of-the-art ultra-low noise lasers and optoelectronic signal sources use macro-scale photonics for mechanical and thermal noise suppression, and off-chip electronics for feedback control. The benchtop or rack mount component-level assembly of these sources limits photonic coupling efficiency as well as the speed of electronic feedback, and also adds size and weight to the system. Integration of these components in a chip-scale form factor could greatly mitigate these limitations.

The DAHI Foundry Technology program thrust seeks to establish an accessible, manufacturable technology for device-level heterogeneous integration of a wide array of materials and devices (including, for example, multiple electronics and MEMS technologies) with complex silicon-enabled (e.g. CMOS) architectures on a common silicon substrate. of The DAHI Foundry Technology thrust will incorporate and build upon the heterogeneous integration technologies of the COSMOS and E-PHI program thrusts, while also developing new capabilities in heterogeneous integration processes, yield and circuit design innovation.