SC08 Workshop — Sunday, November 16, 2008
Power Efficiency and the Path to Exascale Computing
Overview
Over the past forty years, progress in supercomputing has tracked progress in integrated circuit scaling, and this has resulted in exponential improvements in system-level performance. However, changes in device physics now seriously threaten further sustained progress toward exaflops HPC systems. This workshop will begin with a summary of a recent DARPA study highlighting issues associated with exaflops computing architecture. This will be followed by a series of invited talks covering a wide range of approaches to mitigating the exaflops computing roadblocks, including novel computer architectures, power-aware algorithm design, power efficiency metrics, and power efficient facility design.
Tentative Agenda and Schedule
| 8:30–9:00 am | Overview of Exascale Architecture Challenges | Thomas Sterling | Center for Computation and Technology, Louisiana State University |
| 9:00–9:30 am | Challenges in Power Efficient Interconnect Design | William J. Dally | Stanford University, Computer Systems Laboratory |
| 9:30–10:00 am | Challenges in Power Efficient Memory Architecture | Dean Klein | VP of Memory System Development, Micron Technology |
| 10:00–10:30 am | Break: Discussions continued, refreshments served | ||
| 10:30–11:00 am | Power Efficiency Challenges for Exascale Computing | Alan Gara | BlueGene Chief Architect, IBM Watson Research Center |
| 11:00–11:30 am | System Integration Challenges for Massively Concurrent Systems | Steve Scott | Chief Technology Officer, Cray Inc. |
| 11:30 am– 12:00 noon | Roundtable Discussion on Hardware Architectural Issues for Exascale Computing | ||
| 12:00 noon– 1:30 pm | Lunch | ||
| 1:30–2:00 pm | Programming Model Challenges for Managing Massive Concurrency | Katherine Yelick | NERSC Division Director, Lawrence Berkeley National Laboratory |
| 2:00–2:30 pm | Power Aware Algorithms | Padma Raghavan | Director of Institute for CyberScience, Pennsylvania State University |
| 2:30–3:00 pm | Roundtable Discussion on Software and Programming Model Issues | ||
| 3:00–3:30 pm | Break: Discussions continued, refreshments served | ||
| 3:30–4:00 pm | Designing Data Centers for Future Cloud Applications | Dan Reed | Director of Datacenter Design and Multicore Strategy, Microsoft Inc. |
| 4:00–4:30 pm | Power Efficiency and the Fully Instrumented Datacenter | Andres Marquez | Energy Smart Data Center (ESDC), PNNL |
| 4:30–5:00 pm | Roundtable Discussion on Designing Power Efficient Facilities For Exascale Computing | ||
| 5:00 pm | Workshop Adjourns | ||
Organizers
SC08 Conference
Background — Past Meetings
June 20, 2008
ISC'08, Dresden, Germany, Panel Discussion: Is HPC Going Green?
>> HPCwire article
March 13, 2008
SIAM PP08: Dataflow 2.0: The Re-emergence and Evolution of Dataflow Programming Techniques for Parallel Computing
November 14, 2007
Supercomputing 2007: Power, Cooling and Energy Consumption for Petascale and Beyond
February 19, 2007
SIAM CSE07: Beyond Petaflops: Specialized Architecture for Power Efficient Scientific Computing
February 24, 2006
SIAM PP06: How Can Computer Architecture Revolutionize Scientific Computing?