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Future Technologies

The Future Technologies group performs basic research in core technologies for future generations of high-end computing architectures, including experimental computing systems. Using measurement, modeling, and simulation, we investigate these technologies with the goal of improving the performance, efficiency, reliability, and usability of these architectures for our sponsors. Accordingly, we develop new algorithms and software systems to effectively exploit the specific benefits of each technology.

See our group website for more details on these topics:


Group leader: Jeffrey Vetter
Email: vetter@ornl.gov
Phone: 865-576-7115
Fax: 865-241-4008
Group Secretary:Jan Hashmi
Email: hashmijm@ornl.gov
Phone: 865-574-3917
Fax: 865-241-2650
Plant Mail/Location: Building 5100, MS-6173
Postal Mail: ORNL, P. O. Box 2008, Bldg. 5100,
Oak Ridge, TN 37831-6173

Group Members

PRESENTATIONS
Computer Science & Engineering
- Performance
  Sadaf R. Alam, Nikhil Bhatia, Jeffrey S. Vetter (PI) Modeling Assertions: Symbolic Model Representation of Application Performance
Philip C. Roth, Jeffrey S. Vetter (Leader), Weikuan Yu Understanding and Optimizing Data Input/Output of Large-Scale Scientific Applications
Computer Science & Engineering
- Storage
  Philip C. Roth SciDAC-2 Petascale Data Storage Institute
Computer Science & Engineering
- System Software & Tools
  Nikhil Bhatia, Collin McCurdy, Phil Roth, Jeffrey S. Vetter (PI), WeiKuan Yu FAST-OS: Petascale Single System Image
Future Systems
  Sadaf Alam, Jeremy Meredith, Jeffrey Vetter Performance and Productivity of Emerging Architectures
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vetter Programming the Cell Processor: Achieving High Performance and Efficiency
Olaf O. Storaasli ORNL Field-Programmable Gate Array (FPGA) Research Speeds HPC "up to 100X"

 

 
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Updated: Tuesday, 17-Aug-2010 09:46:24 EDT

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