Bio
Dr. Mohanty joined the Department in 2004. His research is in “Low-Power High-Performance Nanoscale VLSI." Dr. Mohanty's research has been funded by National Science Foundation and Semiconductor Research Corporation. Prof. Mohanty is an author of 140+ peer-reviewed journal and conference publications. The publications are well-received by the world-wide peers resulting in an H-index of 19 and i10-index of 36 (from Google Scholar). He has supervised 22 dissertations and thesis. He serves on the organizing/program committee of several international conferences. He also serves on the editorial board of several international journals. Dr. Mohanty is a senior member of IEEE and ACM.
Education
Ph.D., University of South Florida, 2003
M.E., Indian Institue of Science (Bangalore, India), 1999
B.T., Orissa University of Agriculture and Technology, 1995
Courses
CSCE 4730: VLSI Design
CSCE 5730: Digital CMOS VLSI Design
CSCE 5933: Topics in Computer Science and Engineering
CSCE 6730: Advanced VLSI Systems
CSCE 6933: Advanced Topics in Computer Science and Engineering
Selected Publications
Banerjee, S., Mathew, J., Mohanty, S.P., Pradhan, D.K. & Ciesielski, M.J. (2011). A variation-aware TED-based approach for nano-CMOS RTL leakage optimization. ASP Journal of Low Power Electronics (JOLPE), 7(4): 471-481.
Choppali, U., Kougianos, E., Mohanty, S.P., & Gorman, B. (2011). Maskless deposition of ZnO films. Elsevier Solar Energy Materials and Solar Cells (SOLMAT) Journal, 95(3): 870-876.
Mohanty, S.P., & Kougianos, E. (2011). Real-time perceptual watermarking architectures for video broadcasting. Elsevier Journal of Systems and Software (JSS), 84(5): 724-738.
More Articles
Banerjee, S., Mathew, J., Pradhan, D.K., Bhattacharya, B.B., & Mohanty, S.P. (2011). A routing-aware ILS design technique. IEEE Transaction on VLSI Systems (TVLSI), 19(12): 2335-2338.
Mandal, S.K., Mahapatra, R.N., Bhojwani, P.S., & Mohanty, S.P. (2010). IntellBatt: Toward a smarter battery. IEEE Computer, 43(3): 67-71.
Ghai, D., Mohanty, S.P., & Kougianos, E. (2010). A variability tolerant system-on-chip ready nano-CMOS analog-to-digital converter (ADC). Taylor & Francis International Journal of Electronics (IJE), 97(4): 421-440.
Joshi, B., Pradhan, D.K., & Mohanty, S.P. (2010). Fault tolerant nano-computing. In Robust Computing with Nano-scale Devices: Progresses and Challenges, C. Huang (Ed.). Springer.
Mohanty, S.P., & Pradhan, D.K. (2010). ULS: A dual-Vth/high-K nano-CMOS universal level shifter for system-level power management. ACM Journal on Emerging Technologies in Computing Systems (JETC), 6(2): 8:1-8:26.
Selected Conference Presentations
Okobiah, O., Mohanty, S.P., & Kougianos, E. (2011). Towards Robust Nano-CMOS Sense Amplifier Design: A Dual-Threshold versus Dual-Oxide Perspective. Proceedings of the 21st ACM/IEEE Great Lakes Symposium on VLSI (GLSVLSI), Lausanne, Switzerland.
Garitselov, O., Mohanty, S.P., & Kougianos, E. (2011). Fast Optimization of Nano-CMOS Mixed-Signal Circuits Through Accurate Metamodeling. Proceedings of the 12th IEEE International Symposium on Quality Electronic Design (ISQED), Santa Clara, California.
Mohanty, S.P., & Kougianos, E. (2011). PVT-Tolerant 7-Transistor SRAM Optimization via Polynomial Regression. Proceedings of the 2nd IEEE International Symposium on Electronic System Design (ISED).
More Presentations
Garitselov, O., Mohanty, S.P., Kougianos, E., & Patra, P. (2011). Bee Colony Inspired Metamodeling Based Fast Optimization of a Nano-CMOS PLL. Proceedings of the 2nd IEEE International Symposium on Electronic System Design (ISED).
Hosseinabady, M., Lotfi-Kamran, P., Mathew, J., Mohanty, S.P., & Pradhan, D.K. (2011). Single-Event Transient Analysis in High Speed Circuits. Proceedings of the 2nd IEEE International Symposium on Electronic System Design (ISED).
