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Wafer Flatness and Wafer Thickness Variation

Summary:

The semiconductor industry expects continued demand for improved wafer flatness at the exposure site to avoid blurring of ever smaller circuit features due to out-of-focus exposures. This is a challenge for both wafer polishing and wafer metrology tools. We address this challenge by developing optical measurement methods for wafer thickness and thickness variation. We also provide measurements of wafers for customers working on the improvement of wafer polishing processes.

Description:

The goals of this project are the development, characterization, and application of interferometric methods to measure silicon wafer flatness and thickness variation. With the current introduction of immersion lithography, the wafer flatness requirement at the exposure site has become very stringent due to the high numerical aperture of the exposure optics. Next-generation lithography methods, such as EUVL, also have very demanding flatness requirements. The International Roadmap for the Semiconductor Industry (ITRS) predicts an allowed site flatness error for 300 mm wafers of less than 45 nm by 2010 and 25 nm for 450 mm wafers by 2015. This remains a challenge for both wafer fabrication and wafer measurement.

The graph shows the measured site thickness variation of a wafer after corrective polishing.

The graph shows the measured site thickness variation of a wafer after corrective polishing.

NIST developed and characterized an infrared interferometer for measuring the thickness variation of 300 mm silicon wafers. The interferometer operates at a wavelength of 1552 nm and yields a detailed map of the thickness variation with a standard uncertainty of 5 nm. The new measurement system will allow for the production of reference wafers with a calibrated thickness variation that enable users and manufacturers of wafer inspection tools to evaluate and improve measurement performance. Using our measurements, a U.S. company developed a process to manufacture ultra-flat wafers that meet the projected site flatness requirements of the semiconductor industry well into the next decade.

Current research is focused on 1) extending the range of the instrument to enable measurements of thin wafers, 2) reducing measurement errors due to ghost reflections, non-linearities in phase-shifting, and variations in the refractive index of the wafer material, and 3) feasibility study on the measurement of next-generation 450 mm wafers using sub-aperture stitching.

Major Accomplishments:

  • Developed a generic software toolbox for the optimization of phase-shifting algorithms to reduce measurement errors due to ghost reflections and non-linearities in phase shifting.
  • Developed capability and uncertainty budget for measuring the thickness variation of next-generation 450 mm wafers with the 300 mm NIST infrared interferometer through stitching. Performed preliminary capability validation through full-aperture and sub-aperture measurements of 300 mm wafers.
  • Measured the unconstrained flatness of wafers by floating them on a high-density liquid.
Application of the NIST infrared interferometer to measure the thickness variation of a 300 mm wafer.
Application of the NIST infrared interferometer to measure the thickness variation of a 300 mm wafer.

Lead Organizational Unit:

pml

Customers/Contributors/Collaborators:

  • QED Technologies
  • MEMC Electronic Materials Inc
  • Wavefront Sciences
  • IMEC

Staff:

Johannes A. Soons, Program Manager
Ulf Griesmann, Senior Scientist
Quandou Wang, Guest Researcher
Jiyoung Chu, Guest Researcher

Related Programs and Projects:

Contact

Physical Measurement Laboratory (PML)
Semiconductor & Dimensional Metrology Division (683)

General Information:
301-975-6474 Telephone
301-869-3536 Facsimile

100 Bureau Drive, M/S 8220
Gaithersburg, Maryland 20899-8220