FPGA-based multicoincidence recipe and software

The Data Acquisition Platform project allows one to build their own data acquisition instruments that collect and, if necessary, statistically process data in real time and send the results to a standard PC via the USB-2 interface. The collected data can be accessed in real time by a user’s application. While in our case, the effort was started to build instruments that perform pulse time stamping and multiple coincidence detection, relevant to single photon detection and statistical analysis, particularly for quantum information experiments, users can easily modify the data collection algorithm and create a wide range of custom instruments. Because data transfer protocols are already written and debugged, users can significantly decrease development time. At the same time, the project requires a minimal investment in hardware, namely a commercially available FPGA testing board that requires no significant modifications. The only necessary modification is wiring the board to the experiment, which usually involves basic soldering.

The platform is based on a Xylo-EM board and consists of four parts:

1. Our FPGA firmware, that incorporates a data collection algorithm that can be application specific and a program that realizes a data transfer protocol (operates a Cypress FX2 chip that provides USB2 connectivity).
2. Cypress FX2 firmware (provided with the Xylo-EM board) that supports the ez-usb driver run by the host computer – compatible protocol for USB2.
3. Our C code (mid-level driver) that receives the acquired data and prepares it for an end-user application in real time.
4. End-user custom code in your favorite computer language that processes and/or graphs the received data.

Block diagram of the system design (data collecting, storage, FPGA-FX2 interface, FX2 multi-directional interface, EZ-USB driver, mid-level driver, high-level end user (visualization) software. To record an analog signal, an Analog-to-Digital Converter (ADC) can be used. If an existing instrument is used, only the end-user code needs to be customized to match the application. If a new instrument is built, both FPGA firmware (data collection part) and end-user code must be revisited.

Instrument 1: Time-tagging multiple-coincidence detector

Purpose and function:

• Collects data from 4 TTL sources and time-tags the positive edges of TTL pulses.
• Detects coincident positive edges (within one time bin).
• Outputs time-tags of events when one or more channels changed their state from TTL low to high.
• Has no intrinsic deadtime.
• Operates using either an internal clock or an externally provided timer to define temporal bins.
• External TTL or a computer-controlled input restarts the clock (i.e. a “start” channel).

Downloads:

• Assembly instructions and manual
• Pre-compiled project, Source code zip file (FPGA firmware, mid-level driver and sample Labview interface vi’s)

Instrument 2: Multiple coincidence statistics

Purpose and function:

• Collects data from 4 TTL sources and detects single events and coincidental events.
• Accumulates statistical information on these events in hardware and uploads this information to a computer on demand.
• No time tagging information is collected, therefore data exchange with a computer is minimized.

Downloads:

• Assembly instructions and manual
• Pre-compiled project, Source code zip file (FPGA firmware, mid-level driver and sample Labview interface vi’s)

Instrument 3: Multiple analog pulse processing

Purpose and function:

• Collects analog data from one source and detects events. Events are defined as input voltage crossing a pre-set threshold. Events begin with an upward crossing and end with first downward crossing.
• Provides information on each events peak amplitude, length and integral in real time. Accumulates statistical information on these events in hardware and uploads this information to a computer on demand.

Downloads:

• Assembly instructions and manual
• Pre-compiled project, Source code zip file (FPGA firmware, mid-level driver and sample Labview interface vi’s)