Power Device and Thermal Metrology
Contact: Allen R. Hefner, Jr.
PROJECT GOALS
The goals of the project are to (1) develop electrical and thermal measurement methods and equipment in support of the development and application of advanced power semiconductor devices and (2) develop advanced thermal measurements for characterizing integrated circuits (ICs) and devices.
CUSTOMER NEEDS
There are significant technical requirements for more efficient, higher voltage power semiconductor devices. The application needs range from more efficient power supplies for computers and consumer appliances, to electric automobile power converters, to more efficient long distance high voltage power transmission. Rapid technical advances are occurring in the development of new power semiconductor materials and designs to address these needs. With the introduction of these new materials and designs comes new requirements for characterizing the performance and reliability of the fabricated devices.
The most exciting, and potentially revolutionary, development in this area is the rapid progress in the development of wide band-gap semiconductor materials for power semiconductor devices. Wide band-gap semiconductors such as silicon-carbide (SiC) have long been envisioned as the material of choice for next-generation power devices. Recent advances in single crystal SiC and fabrication technology have ushered in a new era of wide band-gap power semiconductor devices. This has led to the introduction of SiC power Schottky diode products in the 400 V to 1200 V range and led to the development of High-Voltage, High-Frequency (HV-HF) power devices with 10 kV, 15 kHz power switching capability.
Several industry and government programs are currently underway to accelerate the development and application insertion of SiC power semiconductor devices. The goal of the DARPA Wide-Band-gap Semiconductor Technology High Power Electronics Program (WBST-HPE) is to develop half-bridge modules with 15 kV, 110 A, 20 kHz capability in the next few years. The emergence of HV-HF devices with such capability is expected to revolutionize utility and military power distribution and conversion by extending the use of Pulse Width Modulation (PWM) technology, with its superior efficiency and control capability, to high voltage applications.
The Electric Power Research Institute (EPRI) also identified the benefits of HV-HF semiconductor technology, which include advanced distribution automation using solid-state distribution transformers with significant new functional capabilities and power quality enhancements. In addition, HV-HF power devices are an enabling technology for alternative energy sources and storage systems. The emergence of HV-HF power devices presents unique challenges in metrology and specification of device electrical and thermal requirements.
While overcoming thermal limitations has always been at the forefront of power semiconductor technology, this has only come to the fore recently in CMOS-based microelectronic circuits. The major issues include: (1) power levels in CPUs have reached the same levels as in power devices; (2) power density nonuniformities are leading to hot spots in microprocessors as well as power ICs; (3) new materials with different thermal properties are being introduced; (4) many new and future technologies (e.g., SOI, 3-D integration) tend to isolate power dissipating elements thermally; and (5) shrinking dimensions and increasing frequency of ICs are causing significant power dissipation in the interconnects. In order to address these issues, reliable methods for measuring the temperature distribution in ICs and power devices are required.
TECHNICAL STRATEGY
The strategy is to support the measurement infrastructure of the semiconductor industry by developing and evaluating measurement methods and techniques where suitable ones do not exist for characterizing critical electrical and thermal properties of devices and ICs. This includes electrical, thermal, and safe operating limit characterization, establishing performance metrics, and developing methods for extracting device model parameters to aid in application insertion. NIST is taking a lead role in developing the device metrology and performance metrics necessary for both the DARPA and EPRI efforts and the new industries envisioned by these programs. NIST is also pioneering electrical and thermal measurement methods for HV-HF devices and advanced thermal metrology for high density ICs.
Performance, reliability, and application characterization for DARPA-WBST-HPE devices and module packages
A major driving force spearheading the development of HV-HF power devices is the ongoing DARPA WBST-HPE program focused on developing the technology deemed necessary to enable Solid State Power Substations (SSPS) for future Navy warships. Current distribution approaches being considered for the next generation of aircraft carriers and destroyers employ a 13.8 kV AC power distribution that is stepped down to 450 V AC by using large (6 ton and 10 m3) 2.7 MVA transformers. Substantial benefits in power quality enhancement, advanced functionality, size, and weight are anticipated by replacing this transformer with an all solid state design. NIST played a key role in WBST-HPE Phase 1 and has been selected to be the exclusive device and package evaluation and metrology lab for the $50M Phase 2 -3 program for 2005 through 2008.
Metrology for mapping SiC power bipolar device degradation
Although significant progress has been made in improving the quality of the SiC starting material and the fabricated devices, a major concern for bipolar structures is an observed degradation in the electrical characteristics over time. The degradation occurs from latent defects such as Basel Plane Dislocations that result in the formation and growth of stacking faults activated by excess carrier recombination. The defects cause severe current nonuniformities to occur, resulting in on-state voltage, switching, and thermal performance degradation.
DELIVERABLE: Develop automated stress and degradation monitoring systems to assess degradation of SiC devices after 10,000 hours of operation.
DELIVERABLE: Utilize NIST one-of-a-kind high speed thermal image measurements to characterize SiC power diode conduction uniformity performance before and after stress conditions and correlate results with light emission stacking fault measurements (with NRL).
Metrology for nondestructive switching failure
Power devices undergo their greatest electro-thermal stress under switching conditions. There are a number of known catastrophic failure mechanisms that occur as a device is switched off with an inductive load. NIST has developed a nondestructive system to test for the failure limits under inductive switching, has done extensive research on Si device failure limits, and will extend that work to include SiC power devices.
DELIVERABLE: Perform unclamped inductive switching measurements for SiC MOSFETs and IGBTs produced by DARPA WBG program.
Circuit simulator models for SiC power switching devices
Parameter extraction is a critical component in developing and using device models in circuit and system simulations and in establishing performance benchmarks for new device technologies. For new devices, not only must new models be developed, but methods must be modified and new ones developed for extracting the parameters for the models.
DELIVERABLE: Utilize NIST IMPACT model parameter extraction tools to characterize SiC power MOSFETs and IGBTs introduced by the DARPA WBST-HPE program.
Develop thermal metrology for power semiconductor package and cooling system
The cooling systems for power electronic devices and modules are often quite sophisticated and complex. In evaluating the efficiency and effectiveness of cooling systems, it is critical to be able to measure the temperature of a packaged chip accurately during actual operation. This means that temperature measurement methods are needed that use a chip electrical parameter as the thermometer. Also, validated electro-thermal device models are needed to speed the system design. New HV-HS semiconductor devices present new packaging challenges and technologies that must be evaluated for high temperature performance, die attack voiding, and thermal cycling capability.
DELIVERABLE: Perform thermal cycling and thermal shock experiments on DARPA WBST-HPE program devices. Use unique NIST high current IGBT TSP system and high speed thermal imaging system to identify die attach and DBC integrity before and after thermal stress.
High-speed thermal image microscopy for on-chip temperature
A limitation of commercially available infrared (IR) thermal imaging systems is their inability to make high speed transient measurements. NIST has modified a commercial IR system to be able to make such high speed temperature maps of a device surface with a better than 1 ms time resolution and a spatial resolution of about 15 mm to 20 mm. Current work involves enhancing the performance and applicability of this unique test method and exploring the potential for addressing critical metrology issues in advanced digital integrated circuits and power devices.
DELIVERABLE: Develop procedure for coating chips with thin high emissivity paint and characterize the performance for high speed IR thermal metrology.
DELIVERABLE: Apply high speed thermal imaging system to characterize the performance of advanced digital integrated circuits including dynamic thermal performance enhancement (with UMD).
ACCOMPLISHMENTS
- Extended capabilities of IMPACT parameter extraction software. The capabilities of the parameter extraction software, IMPACT, were extended to include MOSFETS (in addition to IGBTs) and three polytypes of SiC material (in addition to Si). This was done in collaboration with the University of Puerto Rico , Mayaguez , and two SURF (Summer Undergraduate Research Fellow) students.
- High voltage curve tracer and reverse recovery systems. The development of a 25 kV variable pulse width curve tracer for both 2 and 3 terminal devices was completed. Safety protection and an interlock system have been tested and qualified. A high voltage reverse recovery test system with 3 kV, 15 A capability was also developed. These systems are critical components in the SiC power semiconductor device metrology tasks.
- Chip temperature measurements for power multichip modules. Developed test system and procedures for thermal characterization of Integrated Power Electronic Module (IPEM) and developed electro-thermal model and validation for IPEM. Applied this new measurement and modeling method to commercial high power IGBT half bridge module, commercial six pack IGBT module, and prototype NSF Center for Power Electronic Systems IPEM.
- High speed transient infrared thermal imaging system. The high-speed transient imaging capability has been extended to include a burst method. This feature has been found to be very useful in measuring current uniformity of SiC power devices before and after degradation without degrading the device during the measurement.
- Played a major role in planning and evaluating progress of DARPA Wide Bandgap Power Device program. Developed the metrology, measured device deliverables to government from DARPA contractors, and used NIST data to provide assessment of program to DARPA director.
- Initiated new program with EPRI to develop solid state power distribution transformers using ultra high voltage semiconductor devices. The goal is to replace all existing power distribution transforms with Intelligent Universal Transformers that provide better control of the power grid, provide power factor correction at point of use, improve power quality, and enable plug-and-play insertion of alternate energy sources. NIST aided in mapping existing power semiconductor technologies for this application and in establishing an EPRI road map for development of ultra-high-voltage semiconductor devices.
- Played a major role in initiating and planning a new DARPA/Navy SiC shipboard power distribution program. The program involves insertion of power distribution technologies enabled by ultra-high-voltage semiconductor devices into next generation more electric Navel carrier, destroyer, and submarine platforms.
- Completed development of SiC power MOSFET model and completed development of IMPACT extraction tools for SiC power device model parameter extraction. Performed parameter extraction for SiC MOSFETs produced by DARPA WBG program and validated simulations.
