Polymers Division

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Organic Electronics
	Moisture Transport through Ultra-Low Permeation Barriers
	Chemistry and Orientation with NEXAFS Spectroscopy
Nanoimprint Lithography
	Pattern Transfer and Stability
Polymers for Next-Generation Lithography
	Dissolution Fundamentals
	Surface and Bulk Chemistry of Chemically Amplified Photoresists
	NIST-Industry Partnerships
Dimensional Metrology with Small Angle X-ray Scattering
	Sidewall Angle Metrology
	Dimensional Changes during Fabrication
Characterization of Porous Low-k Dielectric Thin Films

Semiconductor industry will soon require metrology of every microchip to reduce skyrocketing costs associated with problems in front end processing.

For the sub-50 nm technology nodes, current metrologies posses EITHER the precision OR the speed to meet this demand, but not both.

Using 193 nm photolithography, create a double-damscene metal filled test pattern as illustrated to the left.

At each major stage of processing, remove a sample wafer for measurement.

Measure each stage using CD-SAXS and analyze using cross sectional analysis (full sample rotation)

Far Left: The 2-D cross sections of test pattern gratings are schematically shown (far left) for different stages in fabrication.

Near Left: The resulting CD-SAXS data from each stage of processing

Measurements include organic photoresists, oxides, dense barrier layers, and metals.

Direct measurement of pattern quality with minimal modelling required (high speed).

Below: Demonstrating capability to measure 1-10 nm thick layers deposited on pattern sidewalls (barrier layers)

Wen-li Wu*
Ronald L. Jones*
Tengjiao Hu
Christopher Soles
Bryan Vogt
Eric Lin

John Quintana (ANL)
Denis Keane (ANL)
Steve Weigand (ANL)
Jim Leu (Intel)


	Electronics Materials Group Polymers Division Materials Science and Engineering Laboratory