Licensable Technologies : Engineering : Environment/Waste Management

High Speed Imager Test Station

Abstract
A test station enables the performance of a solid state imager (herein called a focal plane array or FPA) to be determined at high image frame rates. A programmable waveform generator is adapted to generate clock pulses at determinable rates for clock light-induced charges from a FPA. The FPA is mounted on an imager header board for placing the imager in operable proximity to level shifters for receiving the clock pulses and outputting pulses effective to clock charge from the pixels forming the FPA. Each of the clock level shifters is driven by leading and trailing edge portions of the clock pulses to reduce power dissipation in the FPA. Analog circuits receive output charge pulses clocked from the FPA pixels. The analog circuits condition the charge pulses to cancel noise in the pulses and to determine and hold a peak value of the charge for digitizing. A high speed digitizer receives the peak signal value and outputs a digital representation of each one of the charge pulses. A video system then displays an image associated with the digital representation of the output charge pulses clocked from the FPA. In one embodiment, the FPA image is formatted to a standard video format for display on conventional video equipment.

IP Status: Available both Exclusively and Non Exclusively

Reference Number: 543

S Number: DOE reference no.(s): 78,300

Patents & Applications:
United States National Patent Number 5467128 Issued on 11/14/1995

Posted: 10-05-2004

Contact
John Russell
Technology Transfer Division
Los Alamos National Laboratory
P.O. Box 1663, MailStop C334
(505) 665-3941
jrussell@lanl.gov