Information Systems Technical Advisory Committee
July 21, 2004
Open Session
1. After introductions Joe Young welcomed Erik Oliver of Synopsys and Greg Taylor of Intel to the ISTAC. He also thanked Frank Quick of Qualcomm for returning to the ISTAC.
2. Maggie Angell of SEMI reported on the summer Technical Working Group on Semiconductor Manufacturing Equipment which met in Vienna earlier in July. The first week was technical in nature and devoted to industry presentations on the equipment and trends. The second week was a government-only session with policy issues as the primary focus. Maggie mentioned that one of the recurring themes in the TWG was the large role that economics plays in volume IC manufacturing. She also expressed support for the goal of “higher fences around fewer items” in setting policy. As part of this new industry-government dialog it is hoped that proposal will be developed for the next round of list reviews.
3. Peter Lichtenbaum of BIS reviewed a number of hot topics and activities. He thanked Maggie Angell and SEMI for her hard work in organizing industry participation in the Wassenaar SME TWG. He said that the TWG was helpful and will provide perspective for BIS evaluation of SME controls. He also indicated that the two US Cat. 3B proposals presently under consideration in Wassenaar are promising and asked the TAC members for new proposals to be evaluated for the 2005 list review. He urged industry to have proposals ready for BIS by mid-October to allow for adequate review in USG. Peter indicated that the two knowledge control drafts (microprocessor and computer technology) are likely to be published this summer. He thanked Norm Lacroix for his work with NSA on the draft crypto regulation currently circulating interagency.
4. Ivo Bolsens of Xilinx presented an overview of FPGAs and discussed trends and future prospects. One interesting development is the maturation of FPGAs from applications involving simple “glue” logic to major functions at the heart of systems. While past applications were often for prototypes only, there are more and more instances of FPGAs being used in high-volume consumer products. He discussed the various types of programmable logic and noted that they are now using state-of-the-art semiconductor processes are often used as the debug vehicles in advanced processes. Xilinx is a large, fabless company and outsources manufacturing and sales (to reps and distributors). The last decade has seen FPGAs increase speed by 20x, capacity by 200x, and improved price per function by 300x. With improved process technology the economic crossover point between ASICs and FPGAs moves lower, allowing more applications of FPGAs in places which previously were too costly. With the industry paying closer attention to power dissipation in ICs the FPGA products tend to be less constrained by active power dissipation than, for example, most microprocessors. Standby power, however, remains just as much a concern for FPGA manufacturers as it does for other IC manufacturers. As he looks into the future, trends include applications involving more specialized, parallel processing, domain-specific platforms, and evolvable hardware. In some ways, the line between hardware and software is blurred with FPGAs. Xilinx products are available in commercial, industrial, and military grades (including rad-hard), with special design flows for the military parts. Ivo expressed no particular issues with present export control regulations.
5. Roz Thomsen of T-B, along with Erik Oliver of Synopsys and Severio Fazzari of Cadence, presented another instance of the use of embedded encryption. They showed the growing use of encryption within EDA software to protect IP. This crypto is used both in authoring IP as well as using IP and is frequently found in the same software tools. Customers are demanding stronger encryption (no longer satisfied with 56-bit DES) for this function and the IEEE is working on a standardized approach. They are protecting trade secret data rather than copyrighted data. The net effect is that CAD software which was formerly classified EAR99 is now turning into 5D002. The encryption is not user accessible and the crypto only works on particular data types (e.g. VHDL and Verilog). They noted that Cat.5 Part2’s exclusion note tends to be hardware-centric. It was also noted that a single software program such as Cadence’s IUS does both encryption (when used by the IP authors) and decryption (when used by chip designers). They proposed several possible remedies to this dilemma and were encouraged to develop one of the alternatives into a working proposal. Several members expressed interest in trying to develop a broader proposal for use in a wider range of applications embedding crypto capability used in both design and manufacturing.
6. David Kirk and John Montrym of Nvidia returned to discuss new developments in graphics processors. They showed the impressive track record of performance gains outstripping Moore’s Law. One trend noted was the migration of graphics processors to become fully-parallel general purpose processors. A hypothetical example of a future GPU would have 64 adders and 64 multipliers (all 32-bit) at a 2 GHz clock frequency. Some customers are now asking for 64-bit capability. They also questioned the rationale for continuing control of computers based on developments in technology and rapidly increasing performance. The problem structure in graphics is starting to mimic the classic parallel HPC applications. They suggested that any continuation of computer controls ought to be at a much higher performance level and take into account more real-world performance factors (memory bandwidth, hierarchy, etc.)
The open session was adjourned.
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