Crosscutting
NSF-NRI Graduate Student and Postdoctoral Fellow Supplements to NSF Centers in Nanoelectronics (NSF 09-016)
 
CONTACTS
PROGRAM GUIDELINES
A revised version of the NSF Proposal & Award Policies &
Procedures Guide (PAPPG), NSF 09-1, was issued on October 1, 2008
and is effective for proposals submitted on or after January 5, 2009. Please be
advised that the guidelines contained in NSF 09-1 apply to proposals submitted
in response to this funding opportunity. Proposers who opt to submit
prior to January 5th, 2009, must also follow the guidelines
contained in NSF 09-1.
One of the most significant changes to the PAPPG is
implementation of the mentoring provisions of the America COMPETES Act.
Each proposal that requests funding to support postdoctoral researchers must
include, as a separate section within the 15-page project description, a
description of the mentoring activities that will be provided for such
individuals. Proposals that do not include a separate section on
mentoring activities within the Project Description will be returned without
review (see the PAPP Guide Part I: Grant Proposal Guide Chapter
II.C.2.d for further information).
Apply to PD 09-016 as follows:
For full proposals submitted via FastLane:
standard Grant Proposal Guidelines apply.
For full proposals submitted via Grants.gov:
NSF Grants.gov Application Guide; A Guide for the Preparation and Submission of NSF Applications via Grants.gov Guidelines apply
(Note: The NSF Grants.gov Application Guide is available on the Grants.gov website and on the NSF website at:
http://www.nsf.gov/bfa/dias/policy/docs/grantsgovguide.pdf)
DUE DATES
Supplement Deadline Date
:
February 20, 2009
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SYNOPSIS
See the Dear Colleague Letter, NSF 09-016, announcing this opportunity at http://www.nsf.gov/publications/pub_summ.jsp?ods_key=nsf09016.
The National Science Foundation (NSF) in cooperation with the Semiconductor Research Corporation (SRC) through the semiconductor industry’s Nanoelectronics Research Initiative (NRI) is again offering supplemental funding opportunities to NSF centers involved in nanoelectronics research to support additional graduate students and postdoctoral fellows to work in collaborative efforts with participating NRI company assignees on exploring new concepts beyond the scaling limits of CMOS (Complementary Metal Oxide Semiconductor) technology. These joint efforts are intended to enhance nanoelectronics research and education, strengthen industry linkages with NSF centers, and develop future cadres of industry and faculty researchers to help drive the field. The NSF Directorates participating are Engineering (ENG), Mathematical and Physical Sciences (MPS), and Computer and Information Science and Engineering (CISE).
The supplemental funding requests shall be for exploratory nanoelectronics research consistent with the mission of the NSF centers that has the potential to meet the needs of the NRI. NRI is focused primarily on research on devices utilizing new computational state variables beyond electronic charge. NRI is also interested in non-charge based interconnect technologies and novel circuits and architectures, including non-equilibrium systems, for exploiting these devices, as well as improved nanoscale phonon management and novel materials and fabrication methods for these structures and circuits. All NSF centers and networks involved in nanoelectronics research are eligible to apply, including those that were awarded supplements in previous competitions.
Abstracts of Recent Awards Made Through This Program
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