Event
Bluespec: Why Chip Design can't be left to Traditional Approaches

January 28, 2004 2:00 PM  to 
January 28, 2004 3:00 PM
NSF, Stafford I, Arlington, VA

Lecturer: Professor Arvind, Professor of Computer Science and Engineering MIT

Hundred million-gate ASICs are possible by the end of the decade. However, numerous problems related to process technology and design need to be solved before such large chips will become commonplace. Computer scientists are much better equipped to solve problems related to the design-in-the-large. Bluespec is a language/methodology that promotes correctness-by-construction. Its underlying execution model is based on atomic actions on state elements (such as flip-flops, registers, ...), i.e., any legal behavior is explainable in a terms of a sequence of atomic actions on the state. Expressiveness of Bluespec is achieved by keeping its static semantics orthogonal to its hardware execution semantics -- the source program is turned into a flat interconnection of modules by "static elaboration" during the compile phase. This talk will present Bluespec via examples and show some of the designs done so far.

This event is part of Distinguished Lecture Series.

Meeting Type
Lecture

Contacts
Michael J. Pazzani, mpazzani@nsf.gov

NSF Related Organizations
Directorate for Computer & Information Science & Engineering