Aliases: Optically Controlled Laser, Gain Quenched Laser Logic, Mode Transition-Discrimination (MTD) photonic logic
Technical Challenge: Standard commercial practice for creation of precise (sub-wavelength) gaps is to use patterned etch masks and dry etching. These patterned etch masks usually require electron beam lithography to provide the precision necessary for the precise gaps. This invention makes use of a sacrificial spacer layer (S2L) to create a precise gap between optical components, where the width of the gap can be resonant (or anti-resonant) with the optical signal present in the optical components. The gap fabrication process of this invention is simpler, faster, and less costly compared to typical commercial processes for creating precise gaps.
Description: Using a simple, microelectronics compatible process, this invention provides the ability to fabricate low-loss waveguide turning mirrors integrated to channel waveguides that would be used for interconnections between components within photonic integrated circuits (PICs). Creation of precise gaps between waveguides and their channels significantly reduces losses for those waveguides when compared to channel waveguides without gaps. Turning mirrors are required to change the direction of optical signals, while they are routed between components in PICs.
The S2L is used to create a gap at the edge of the waveguide and provides optical confinement at that waveguide interface. Waveguide turning mirrors can be fabricated with this method, where the reflective surface of the mirror is defined by the removal of the S2L material. This method also allows for the creation of waveguide turning mirrors by traditional etched mirror processes, while coupling that etched turning mirror to waveguides with S2L gaps for loss reduction. A simple wet chemical etch is used to remove the S2L.
Demonstration Capability: Tests devices have been fabricated, which use this method and demonstrate the fabrication of precise gaps using sacrificial spacer layers.
Potential Commercial Application(s): This method is compatible and applicable to most photonic integrated circuit fabrication processes.
Patent Status:A patent application has been filed with USPTO.
Reference Number: 1424-2
If you are interested in exploring this technology further, please call 443-445-7159 or express your interest in writing to the National Security Agency, Domestic Technology Transfer Program, 9800 Savage Road, Suite 6541, Fort George G. Meade, Maryland 20755-6541.