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Project Brief


Microelectronics Manufacturing Infrastructure (October 1998)

Ultra-Low Dielectric Constant Materials for Integrated Circuit Interconnects


Develop and test new high-performance integrated-circuit insulation materials based on nanoporous polymeric materials and evaluate their suitability for long-term use through several future generations of high-density chips as feature sizes shrink and the demands on the dielectric get tougher.

Sponsor: Dow Chemical Company

External Technology
1714 Building
Midland, MI 48674
  • Project Performance Period: 4/1/1999 - 9/30/2002
  • Total project (est.): $17,605,771.00
  • Requested ATP funds: $8,556,629.00

State-of-the-art integrated circuits (chips) contain some 3 to 6 million transistors and more than 800 meters of wiring. Within the next 10 years, chips will contain 1 billion or more transistors and 10,000 meters or more of wiring. To minimize electrical cross-talk between such closely packed wires and ensure optimum chip performance, the semiconductor industry requires dramatically improved insulators for separating the wires. Although there have been major advances in this technology, an ideal material with ultra-low dielectric constant has not yet been found. Dow Chemical and the IBM Almaden Research Center (San Jose, Calif.) propose to invent and optimize porous polymeric materials, an emerging class of highly effective insulators. The Dow/IBM team will investigate several candidate materials and evaluate their suitability for long-term use through several future generations of high-density chips as feature sizes shrink and the demands on the dielectric material get tougher. Technical challenges include developing ways to make fully closed pores of uniformly small size, achieving pore volume low enough to provide adequate mechanical properties, and devising simple and reliable production processes. In addition, the team must create a viable materials solution, with an adjustable dielectric constant as low as 1.5 that will span multiple generations of future integrated circuits. Two materials will be investigated: inorganic materials derived from organosilicate polymers and organic thermosetting polymers. The new materials will be characterized and integrated into multilayer copper-wire interconnect test structures, which will be evaluated for yield, performance, and reliability. Researchers at Stanford University (Palo Alto, Calif.), the University of Maryland (College Park, Md.), and Washington State University (Pullman, Wash.) will perform some of the studies and tests, and Dendritech, Inc. (Midland, Mich.) will provide some of the pore-generating materials. The ATP project will enable the development of candidate solutions to meet industry needs in a timely manner. Widespread use of the new technologies will help enable the electronics industry to continue the trend of performance increases and cost reductions. The new materials will offer spillover benefits in other electronics technologies requiring low-loss materials and in the development of future computer hardware and software.

For project information:
Carol Humbyrd, (517) 636-7857
chumbyrd@dow.com

Active Project Participants
  • IBM, Almaden Research Center (San Jose, CA)
    [Original, Active Member]

ATP Project Manager
Purabi Mazumdar, (301) 975-4891
purabi.mazumdar@nist.gov


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