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Semiconductor Lithography

NOTE: From 1994-1998, the bulk of ATP funding was applied to specific focused program areas—multi-year efforts aimed at achieving specific technology and business goals as defined by industry. ATP revised its competition model in 1999 and opened Competitions to all areas of technology. For more information on previously funded ATP Focused Programs, visit our website at http://www.atp.nist.gov/atp/focusprg.htm.
Program Manager
Purabi Mazumdar

TEL 301-975-4891
FAX 301-926-9524
purabi.mazumdar@nist.gov

National Institute of Standards and Technology
A415 Administration Building
Gaithersburg, MD 20899


The objective of this program is to promote U.S. leadership in the global market for future generation semiconductor lithography equipment through advancements of technologies for 100nm lithography and below.

BACKGROUND

The tremendous growth of the semiconductor industry since its inception has been achieved by reducing the cost per function of integrated circuits by about 25-30% a year. The semiconductor industry has kept on the historic productivity curve by improving equipment performance, throughput, and uptime; by improving manufacturing yield and efficiency; by improving product quality and reliability; and by increasing wafer size. However, the most significant contributor to keeping on the historic productivity curve has been by reducing integrated circuit feature sizes through advances in lithography.

Reduction in feature sizes allows semiconductor manufacturers to fabricate more devices per wafer, reduce the size (hence the cost) per device, and increase the performance of each device. These advances translate into consumer benefits through electronic products that are smaller, cheaper, and superior in performance.

Optical lithography has been the technology of the industry for more than 30 years, taking the feature sizes from 10 microns in the late 1960's to present production feature sizes of 0.25 microns (250nm). While further improvements are expected in optical lithography, this technology is not expected to take feature sizes to 100nm and below. The industry is aggressively searching for a lithography solution (imaging technology) which will be capable of printing chips for the 100nm device generation and below. The exact time for transition to the new imaging technology is uncertain, but it is anticipated that production with 100nm features will begin in year 2005.

POTENTIAL FOR U.S. ECONOMIC BENEFIT

The $8 billion lithography industry is the cornerstone of the $140 billion world semiconductor industry. The lithography industry is projected to grow to more than $25 billion by year 2005. Achieving a leadership position in this critical marketplace is essential for U.S. companies in order to maintain and improve their position in the world semiconductor market.

New semiconductor fabrication facilities cost between $1-$3.5 billion and the cost of lithography equipment constitutes from 25% to 35% of the cost of these facilities. Building new facilities and upgrading existing facilities is the driving force behind the semiconductor lithography equipment industry.

At present foreign companies hold more than 80% of the lithography equipment market. U.S. companies have superior technology in many aspects of lithography infrastructure, and with further development could exploit technology leadership into market leadership. Other lithography technology areas of strategic importance to the U.S. semiconductor industry require research to make U.S. companies competitive in the global marketplace.

This program will help U.S. companies gain market share by catalyzing collaboration between companies, universities, and research organizations to reduce the overall cost of R&D and providing opportunities to accelerate development of key technologies.

TECHNICAL IDEAS

The semiconductor industry is exploring five alternative imaging technologies for their potential as an industry-wide replacement for optical lithography: X-Ray, SCALPEL, ion beam projection, extreme ultra violet, and electron beam direct write. These imaging technologies and the infrastructure technologies supporting them are based on novel, innovative, and cutting-edge ideas; not incremental improvements over existing technologies. As such, the level of technical risk is very high. Feature sizes below 100nm have not been achieved in manufacturing by any company in the world.

STRONG INDUSTRY COMMITMENT

The program idea evolved from white papers received from industry and SEMI/SEMATECH and from two workshops held recently. More than 70 representatives participated in these workshops. The strong commitment of this industry is evidenced by participation of the entire industry production chain. This included major semiconductor manufacturers such as IBM, Intel, Lucent, Motorola; equipment manufacturers such as: SVGL, Ultratech Stepper, Integrated Solutions; and infrastructure companies for mask, resist, metrology, optics, tool design, inspection, etc.

OPPORTUNITY FOR ATP FUNDING TO MAKE A SIGNIFICANT DIFFERENCE

The U.S. industry at present spends approximately $800M on R&D in this area, with about $250M on infrastructure technologies. Due to strong international competition, most of these funds are spent on development and very near-term research. This focused program can make a significant impact on long-term R&D in infrastructure technologies. These infrastructure technologies have common areas that address the needs of some or all of the potential future imaging technologies.

To regain competitive advantage in the world market, the U.S. equipment industry has to use the "Window of Opportunity" coming up during the critical transition years from optical Lithography to another imaging technology. This program can make significant difference by accelerating the development of key technologies through catalyzing collaborative efforts and providing matching funds.

SCOPE

This program will focus on improving the ability of the U.S. lithography supplier infrastructure to meet the technology needs of the lithographic systems extendible to 100nm and below.

Date created: November 1998
Last updated: April 12, 2005

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