Prepared by:

Michael Schen, Program Manager Materials and Manufacturing michael.schen@nist. gov Tel. (301) 975-6741 Fax. (301) 926-9524

Purabi Mazumdar, Business Manager Information Technology & Electronics Office purabi.mazumdar@nist. gov Tel. (301) 975-4891 Tel. (301) 926-9524

For a proposal kit or further information please see our web page at http://www.atp.nist.gov or Email to atp@nist.gov or telephone 1-800-287-3863 (1-800-ATP-FUND) or fax to 1-301-926-9524 or 301-590-3053

SUMMARY

The ATP Microelectronics Manufacturing Infrastructure (MMI) focused program will help industry to develop and improve technologies for microelectronics manufacturing integration, across suppliers and users, from chip to package to board. The objective of the program is to enable world-class competitive electronic product manufacturing through product-driven industrial integration. This objective has the effect of building manufacturing strengths within U.S. infrastructure companies to improve their capabilities and improve the competitiveness of themselves, their customers, and the U.S. electronics industry. The program will achieve its objective through industry-proposed, supported, and conducted research directed at major components of electronic systems. The scope of this solicitation is a 5x3 matrix consisting of Materials, Design Tools, Manufacturing Equipment, Measurement and Test, and Manufacturing Process technical areas versus Chip, Package, and Off-chip Interconnect Substrate product technologies. Acceptable proposals must include R&D in at least two distinct elements of this matrix.

PROBLEM STATEMENT

Most of the U.S. electronics manufacturing supplier infrastructure firms are small. For example, of the 192 member companies of SEMI/SEMATECH ⁽¹⁾, 109 have annual sales of $10 million or less and 161 have annual sales of $100 million or less. The infrastructure firms that support circuit board assembly are similarly small. In the past, much of the R&D necessary to advance infrastructure technology was done by the large customer companies. These companies were very effective not only in developing and integrating their skills in semiconductor and printed wiring board technologies, and in design for manufacturing, but also in translating many of these advancements to their suppliers. Today, these supporting infrastructure firms are discovering that their foundation on which to build future products is running out because they are no longer the beneficiary of new technologies from their customers. In addition, they cannot afford, on their own, to do the longer term, higher risk research needed for products 5-10 years from today.

There are needs, which are identified in the technology roadmaps for the U.S. electronics industry ^{(2), (3), (4)}. One such need from the Institute for Interconnecting and Packaging Electronic Circuits (IPC) ³ shows that while chip performance ² and electronic system performance ⁴ both are projected to follow the same growth trajectory over time, the capabilities of the off-chip interconnections between them are not. This is not yet a serious problem, but will be within the next ten years when off-chip interconnections will become a major bottleneck.

PROGRAM OBJECTIVES AND GOALS

The technical objective of the Microelectronics Manufacturing Infrastructure (MMI) focused program is to create new materials, tools, and processes to support microelectronics manufacturing integration from chip to package to board. The aim of the program is to spur development of innovative, high-risk, cost-effective technologies within four thrust areas: wafer technology, semiconductor packaging, very high density off-chip interconnects, and chip-to-board integration. In so doing, the following technical goals are expected to be accomplished.

• Wafer Technology: Accelerate adoption of new semiconductor wafer technologies needed to speed integration. This goal centers on the need for new technologies for fabrication of future semiconductor devices. Existing semiconductor device technology is facing fundamental limits requiring innovative solutions. Alternative materials, processes, equipment, and design rules for wafer patterning and on-chip interconnecting are needed to allow reductions in future device feature size and increases in overall chip dimensions.
• Semiconductor Packaging: Develop new and improved packaging technologies. This goal centers on technologies related to efficient and cost effective chip packaging that support the I/O count, electrical performance requirements, and overall complexity of future chips. This includes materials, equipment, design, testing, and process technologies that support area array, chip scale, and wafer level packages.
• Very High Density Off-chip Interconnects: Greatly amplify the density, performance, and usefulness of off-chip interconnects. This goal addresses needs for interconnecting future semiconductor devices. The challenge for the off-chip interconnect industry is to cost effectively match the chip connect pad count and feature size scaling trends of the semiconductor industry. This requires more efficient utilization of board-level "real estate" and adoption of new interconnection methods. Matching this trend is necessary if the electronic package and board is to enhance, rather than inhibit, the performance of semiconductor devices.
• Chip to Board Integration: Extend the integration from chip-to-package-to-board to dramatically enhance the miniaturization and performance of commercial electronic products. This goal centers on the need to quickly and cost-effectively design and manufacture electronic systems, from chip-to-package-to-board, with optimized total system performance. The challenge facing the electronics industry is to ensure semiconductor performance can be quickly utilized in the manufacturing of final electronics products. Technologies must be integrated from the design and fabrication of chips and other integrated components, to the interconnection of these devices and components to advanced boards in final systems.

The business objective of the Microelectronics Manufacturing Infrastructure (MMI) focused program is to promote U.S. economic growth by enabling future world class competitive electronic product manufacturing through product-driven industrial integration. This business objective will be realized through the following program goals.

• Bring advanced technology into the marketplace faster. Rapid product obsolescence and shortened product design cycles between new generations are key features for this industry. Investment in future generation technologies is crucial to the continuous roll-out of new products needed to compete internationally.
• Spur the development of new electronic products. Strong U.S. competitiveness and increased global market share hinges upon the delivery of increased function at ever lower cost. Effective integration, across suppliers and users, from chip to package to board is needed to further reduce the cost per function of electronic components and products, and achieve common industry goals.
• Expand the market share of U.S. firms in the global market for products. A stronger U.S. infrastructure well integrated across the electronics manufacturing base positions U.S. supplier and products manufacturers to capture greater shares of new and existing markets. Expanding markets rely on: creating new markets by developing new technologies, applications and products; and expanding existing markets by continuously improving existing products through adoption of new technologies and practices.
• Reduce the costs and time of required R&D. Through effective collaboration and integration among business segments which historically have not been well coordinated, scarce industry resources can be efficiently leveraged and brought to bear on critical technology barriers. Such collaborations then lay the foundation for quick team formation in response to tomorrow's needs.

PROGRAM PLAN AND SCOPE

The product-driven industrial integration business goal of this program effectively sets the strategy for conducting this ATP focused program. Key to success is the building of vertical and horizontal business alliances which come together to address industry-wide problems, then re-form to address subsequent generation challenges. Thus, emphasis on integration of the technical and business enterprise is most important.

The microelectronics industry has highlighted the need for research in the following product technologies:

• semiconductor chip technologies;
• packaging of semiconductor chips;
• board interconnection;
• systems interconnection.

In a similar vein, they are also calling for advances in the following technical areassupporting the above stated product technologies:

• materials;
• design;
• manufacturing equipment;
• measurement and testing devices;
• manufacturing processes.

The solicitation strategy proposed by industry to meet their needs, and adopted within this program, is framed in the Program Scope Matrix shown in Figure 1. Project proposals are solicited across the 5x3 matrix that consists of Materials, Design Tools, Manufacturing Equipment, Measurement and Test, and Manufacturing Process technical areas versus Chip, Package, and Off-chip Interconnect Substrate product technologies. The (98-06) solicitation is not open to proposals in systems interconnection (column 5), as this is seen as an issue for large scale integration. A key element of the solicitation strategy is the requirement that acceptable proposals must consist of R&D in at least two elements of the program scope matrix; thereby openly promoting partnering vertically, and horizontally, or both, among the many companies in this diverse food chain. While the ATP and the (98-06) Microelectronics Manufacturing Infrastructure (MMI) focused program encourages collaborations where they make sense, the program also welcomes single applicant proposals from companies that are able to integrate their proposed R&D vertically, horizontally, or both across at least two elements of the Program Scope Matrix.

Figure 1: Program Scope Matrix

TECHNICAL BARRIERS AND IDEAS

Five dominant product forces drive today's microelectronics technology: smaller, thinner, lighter, faster and cost-effective. Industry anticipates these trends to continue and accelerate into the 21st Century, challenging the foundation of today's manufacturing practices. Today's cellular phones, products generally unavailable five years back, are a mere fraction of their size one year ago. Portable communication products are conceived, designed and produced entirely in 12-15 months, in lieu of the 21-27 months to design a few years ago ⁽⁵⁾. Short product development and use life-cycles drive the need for a quick-response supply and manufacturing infrastructure. These forces underlie the technical and cultural challenges facing the U.S. microelectronics industry and are the subject of the technology roadmaps developed by industry.

As a result of the various industry white papers submitted to the ATP, several barriers facing the U.S. electronics industry emerge. These barriers are also articulated in industry's most recent technology roadmaps ^{2, 3, 4}. Some of these barriers are:

• Fundamental physical limitations of current on-chip interconnection materials are driving the semiconductor industry to consider alternative technologies for "wiring" tomorrow's semiconductor devices. At the same time, the growing size of chips and miniaturization of on-chip feature sizes are driving the migration to alternative technologies more quickly than previously thought. Increased R&D, beyond the pathways being explored by industry, is needed for interconnect solutions beyond the next generation technologies.
• Optical lithography has been the workhorse of the semiconductor industry over the past 30 years. By using light sources from ever shorter wavelengths and complex exposure technologies, industry has been able to decrease chip feature sizes by forty-fold and reduce cost per transistor function by about 25% per year. Industry expects optical lithography to come to an end and today, numerous alternative technologies are being explored.
• A paradigm shift is underway in semiconductor packaging technology as industry attempts to quickly adopt area array chip packaging technologies to accommodate the rapidly growing lead counts and sizes of semiconductor dice. Without advancements in a number of enabling technologies, semiconductor packaging will further inhibit, beyond today's levels, the delivery of semiconductor performance to the system.
• A rapidly growing gap in interconnect density now exists between the semiconductor device, the needs of the OEMs, and the capabilities of the off-chip interconnect substrate or PWB. This gap will continue to widen due to the migration from high-density peripheral interconnection to high-density area-array interconnection and the growing convictions of OEMs to miniaturize future products. Improvements in a number of technologies across the entire program scope are needed to prevent the continued widening of this gap and loss of advanced interconnect technologies.

These barriers carry with them a wide range of possible, high-risk solutions. The following ideas were identified by industry in their white papers and are within scope of this focused program. These ideas include, but are not limited to, the following:

Wafer Technologies

• Process technologies for large area wafers
• Advanced plasma processing, film deposition and planarization techniques
• "Green" wafer technologies
• Hybrid low K dielectrics
• In situ and on-line process monitoring and control of wafer processing
• Metrology, mask, and resist technologies for lithography

Packaging Technologies

• Advanced chip interconnect materials
• Low CTE chip carrier materials
• Wafer level packaging
• Planar heat transfer
• In-line testing
• Yield learning and prediction

Very High Density Off-chip Interconnects

• Very fine-line microvias
• High speed electrical testing
• Dimensionally stable dielectric materials and substrates
• Precision imaging and registration
• Optimized low-cost and high-frequency embedded passives

Chip-to-Board Integration

• Computer aided design technologies
• Model-based, sensor-driven integrated manufacturing
• Integrated design models (thermal, mechanical, electrical, reliability) for few-chip modules

EXCLUSIONS

ATP funds cannot be used for work beyond proof of concept or early prototype stages. Industry ideas and industry comments leading to this focused program plan have reinforced their need for technology integration, across supplier and users, from chip to package to board. Also ATP has other focused program competitions underway that broadly involve the U.S. electronics and related industries. Hence the following areas are considered out of scope for the (98-06) Microelectronics Manufacturing Infrastructure (MMI) focused program competition.

• R&D and R&D partnerships that are not either vertically or horizontally integrated across the Program Scope Matrix and that do not involve at least two elements of the matrix.
• Technologies for photonic devices or components, and their packaging.
• Technologies for electrical power components or their systems for within electronic products.

U.S. ECONOMIC BENEFIT

The manufacturing chain for the electronic component industry consists of three major sectors: semiconductor devices, circuit boards, and assembly. These three sectors are supported by infrastructure companies, most of which are small and support niche areas in equipment, materials, measurement and testing, processes, design, and others.

The semiconductor device industry had U.S. factory sales of $63 Billion in 1996 ⁽⁶⁾. Of this, the industry reinvested nearly 10.5% of its sales to maintain its competitiveness ⁽⁷⁾. The supporting materials and equipment companies had sales of $22 Billion in 1996 ⁽⁸⁾, of which roughly 5% was reinvested into R&D. The business areas and annual sales of some of the member companies of SEMI/SEMATECH shows the fragmentation of these supporting companies. Out of 192 companies, 109 have annual sales of $10 million or less, including 57 with annual sales of $2 million or less.

Fragmentation in the board and assembly sector is exemplified by the $8.3 Billion printed circuit board industry ⁽⁹⁾. There were more than 693 companies in the U.S. for manufacturing of rigid printed wiring boards in 1996. Of these, 500 companies had annual sales of less than $5 million ⁽¹⁰⁾. The U.S. printed wiring board and assembly industries reinvest on average about 1% of revenue in mostly short-term R&D ⁽¹¹⁾.

Due to this fragmentation, the needs of the industry are not being addressed in a coordinated, well-integrated fashion. The Microelectronics Manufacturing Infrastructure (MMI) focused program is expected to catalyze synergism and collaboration between companies to create an integrated infrastructure capable of manufacturing electronic components that are superior and competitive in the world market in terms of performance, cost, time-to-market, reliability, size, and weight.

This will impact the U.S. economy by: (1) bringing advanced technology to the marketplace faster, (2) spurring development of new electronic products, (3) increasing the market share of U.S. firms in the world market by improving their competitive position, (4) increasing the market for portable electronic products through improvement of perceived value and utility, and (5) reducing the cost and time of required R&D. The impacts due to the last two factors cannot be quantified at this stage. Market pull and technology push will shape them in ways as yet unknown to us. Historically, we have seen this happen for the last 50 years.

Let us examine the present and projected markets to quantify the effects of the third factor. The U.S. electronic component industry had factory sales of $128 Billion in 1996 and employed 673,000 workers ⁽¹²⁾. Although the U.S. is strong in semiconductor technology and has 46% of the world market ⁽¹³⁾, there is a trade deficit of about $8 Billion in this industry, mostly in the passive components market segment ⁽¹⁴⁾. Strengthening the overall components industry will stimulate its growth in the U.S.

Growth in the electronic component industry will help the U.S. gain market share in the $1,018 Billion world electronic products market, which is projected to grow to $2 trillion in the year 2000 ⁽¹⁵⁾. The U.S. electronic products industry had sales of $422 Billion in 1996, with $135.4 Billion in exports and a negative trade balance of $22.9 Billion ⁽¹⁶⁾. Even a modest 1% increase in the world market share in the year 2000 will bring the U.S. factory sales up by $20 Billion, thus boosting the economy and reducing the trade balance significantly. As an example, increasing the number of cellular telephones sold by U.S. factories from 7 million to 14 million units ⁽¹⁷⁾ will increase sales by approximately $1.4 Billion. This is a very conservative goal considering the growing middle class of Asia, which is expected to top 700 million by year 2010, and the relatively low ownership of telephones in these countries. In China today, there is one telephone for every 25 people ⁽¹⁸⁾.

Electronic components play a major role in advancements of products and services in other industries including automotive, aerospace, health, education, defense, entertainment, etc. In addition to stimulating economic growth, these advancements enhance the quality of life and safety of our people. A stronger U.S. manufacturing supply chain for microelectronic products will have cascading economic benefits in all these areas where U.S. competitiveness remains strong.

INDUSTRY COMMITMENT

This industry has long recognized the value of collaboration to solve industry-wide problems, forming such groups as the Semiconductor Industry Association (SIA), the Institute for Interconnecting and Packaging Electronic Circuits (IPC), the Electronics Industry Association (EIA), the American Electronics Association (AEA), the National Electronics Manufacturing Initiative (NEMI), Semiconductor Equipment and Materials International (SEMI), SEMATECH, the Semiconductor Research Corporation (SRC), and the Interconnection Technology Research Institute (ITRI). In addition, the National Center for Manufacturing Sciences (NCMS) has been effective in developing collaborative R&D teams in electronics manufacturing.

The Microelectronics Manufacturing Infrastructure (MMI) focused program is designed to foster collaborations in high technical risk projects, ones not likely to be undertaken by industry alone, and to leverage industry's current tendency to collaborate. Nearly all of the pathways described within the industry white papers represent inter-disciplinary approaches requiring cross-industry participation for development, demonstration and adoption. While the ATP and the (98-06) Microelectronics Manufacturing Infrastructure (MMI) focused program encourages collaborations where they make sense, the program also welcomes single applicant proposals from companies that are able to integrate their proposed R&D vertically, horizontally, or both across at least two elements of the Program Scope Matrix (Figure 1). The many examples of successful partnerships and consortia in sectors of this industry lend credence to industry's statements that they will actively seek partnerships to tackle the cross-sector integration issues highlighted above.

This industry has historically participated in ATP competitions. Since 1990, nearly $13 M in total funding has been committed through general competitions. These investment are largely in the area of materials, manufacturing systems, and devices. The many elements of this industry are familiar with ATP and compete well in its competitions.

The microelectronics industry has contributed numerous planning documents addressing the focused program criteria. Over 40 white papers were submitted in 1993 and 1994, responding to ATP's initial announcements of the intent to fund focused programs. More recently, ATP received over 37 white papers. These and two industry workshops led to this focused program plan. In addition, as mentioned before, the IPC, NEMI and SIA have all developed roadmaps designed to articulate collective industry expectations and the resulting required technologies ^{2, 3, 4}. Our industrial colleagues have made it clear that they are willing to collaborate with ATP to address these technology requirements.

OPPORTUNITY FOR ATP TO MAKE A DIFFERENCE

There are two main arguments pointing toward unique contributions of this investment. They are (1) the potential to change the business basis for the many companies in the microelectronics food chain, and (2), the potential to resolve an industry-wide problem in a time frame which is critical to U.S. competitiveness. To some extent these are linked, but it is reasonable to treat them independently.

Since the inception of the integrated circuit industry, much of the semiconductor materials, equipment and processing research for future manufacturing technology has been performed in large, vertically integrated companies. These companies supported the electronics manufacturing technology base from the most basic materials research, beginning with understanding how to purify silicon and control its electrical properties, through complex manufacturing systems. Virtually all of the major equipment and processing research for devices, integrated circuits, assembly and packaging, and printed circuit board technology advances were made at major corporate laboratories. Key to the introduction of new technology was the reliance of these vertically integrated companies on the revenues from systems sales to fund the device, materials, and processing technology research necessary to continually advance the technology at a rate which came to be known as Moore's Law.

A few years ago, intense international competition drove the stratification of the U.S. electronics manufacturing food chain into supplier, device manufacturing, and systems integration sectors. This stratification, as well as lower profit margins caused by competition from domestic companies which benefitted from the research from the central laboratories, resulted in rapid downsizing in the scope and scale of corporate manufacturing research in the U.S. It remains to be demonstrated that the current supplier industry can generate sufficient revenue to support the research and development required to keep the industry on Moore's Law. The Microelectronics Manufacturing Infrastructure (MMI) focused program is designed to engage all layers of the electronic materials and manufacturing chain in a wide variety of vertically and horizontally integrated partnerships. The anticipated technical successes, although important, will also point to ways in which the industry infrastructure may be mobilized to address technical problems. Hence, this focused program is intended to nucleate a new infrastructure of partnerships which will be capable of sustaining itself and performing critical research and development necessary for upcoming generations of electronic materials, processes, and manufacturing.

The second unique contribution of this program is the anticipated engagement of the many small and medium size companies in the conduct of research which is critical to solving a problem which exists today and will grow worse in the future. The technical goal of this program is to avoid future gaps between semiconductor device performance and the ability of the packaging and assembly industries to exploit that performance and meet the needs of their OEM customers. From a timing standpoint, the electronics industry has recognized the criticality of this period and the necessity to bring its entire manufacturing spectrum to the same development pace.

Today's $1 Trillion electronics market is the world's largest and most strategic industry. With that comes intense international competition, fueled by private and public investments, primarily from Japan and Asia ⁽¹⁹⁾ in all areas of semiconductor, board and assembly technologies. This competition spurs rapid product obsolescence and necessitates high levels of investment across all stages of the R&D life cycle.

No current major U.S. government program aims to assist the creation of a virtual, product-driven microelectronics manufacturing infrastructure. Existing investments by DARPA and other portions of the DOD primarily address specific military needs or highly advanced technologies which could be the foundation for new high performance logic or communications devices. Prior DARPA programs supporting new technologies in electronic packaging have expired. Those programs illustrated the ability of this industry to team across supplier-customer boundaries and highlighted the need for high-risk R&D addressing industry's needs. As an investor in the Nation's science base, NSF maintains three Engineering Research Centers, one in conjunction with the SRC, in areas within scope of this focused program ⁽²⁰⁾. NSF also supports individual investigators in semiconductor and packaging sciences. These centers and their faculty are an ideal source of high risk technical ideas, they actively partner with industry, and they are well poised to participate with ATP proposers.

Consortia play an essential role in the reinvestment strategy for the semiconductor industry, supporting fundamental research and infrastructure technologies, through the SRC and SEMATECH. On a greatly reduced scale, the board and assembly arena created ITRI, a consortium focused on near-term technology needs. Only within the last two years have deliberate efforts to coordinate and team across these three consortia occurred to insure technology continuity across traditionally separate businesses. Both companies and universities that participate in these consortia are likely players in new ATP Microelectronics Manufacturing Infrastructure (MMI) focused program.

ENDNOTES

1. SEMI/SEMATECH is a consortium of U.S.-based equipment and materials suppliers to the semiconductor industry. Data from Annual Report, 1996.

2. National Technology Roadmap for Semiconductors, Semiconductor Industry Association, San Jose, CA, 1994, 1997.

3. National Technology Roadmap for Electronic Interconnections, Institute for Interconnecting and Packaging Electronic Circuits, Lincolnwood, IL, 1995, 1997.

4. National Electronics Manufacturing Technology Roadmap, National Electronics Manufacturing Initiative, Inc., Herndon, VA, 1996.

5. Circuits Assembly, Marietta, GA, pg. 20, May 1997.

6. Electronic Industry Association, Electronic Market Data Book, 1997.

7. Semiconductor Industry Association, San Jose, CA, 1997.

8. SEMI/SEMATECH Annual Report, 1996.

9. Electronic Industry Association, Electronic Market Data Book, 1997.

10. The Institute for Interconnecting and Packaging Electronic Circuits, Technology Marketing Research Council Report, 1997

11. Productivity Benchmarking for Independent Printed Wiring Board Manufacturers, 1995 and; IPC Study of Performance Benchmarks for Original Equipment Manufacturers Performing Electronics Assembly, 1996, Institute for Interconnecting and Packaging Electronic Circuits, Lincolnwood, IL.

12. Electronic Industry Association, Electronic Market Data Book, 1997.

13. SEMI/SEMATECH Annual Report, 1996.

14. Electronic Industry Association, Electronic Market Data Book, 1997.

15. SEMI/SEMATECH Annual Report, 1996.

16. Electronic Industry Association, Electronic Market Data Book, 1997.

17. 7.2 million units were sold at an average price of $230, Electronics Market Data Book, 1997, EIA.

18. Electronics manufacturing in the Pacific Rim, Report of JTEC/WTEC Program, 1997.

19. Electronics Manufacturing in the Pacific Rim, JTEC/WTEC Program, Loyola College in Maryland, Baltimore, MD, 1997.

20. NSF, Division of Engineering Education and Centers, Engineering Research Centers; Center for Environmentally Benign Semiconductor Manufacturing, University of Arizona; Center for Low Cost Electronic Packaging, Georgia Institute of Technology; and Center for Advanced Electronic Materials Processing, North Carolina State University.

Date created: December 1997
Last updated: April 11, 2005